1. Field of the Invention
The present invention relates to a comparator with offset voltage, more particularly, to an analogue comparator having a differential input stage.
2. Background of the Related Art
An input stage of a comparator is generally constituted with a differential circuit that amplifies the voltage difference of two input signals. The two input signals are cancelled by each other when they have opposite phases and equal magnitudes, which results in no output signal.
FIG. 1 is a diagram that shows a differential circuit enabling to control an offset voltage. FIG. 1 is a diagram from U.S. Pat. No. 4,754,169.
Referring to FIG. 1, a current I of a reference current source is I=VREF/R1. Additional details of the reference current source are shown in FIG. 2. The current I further becomes I=IREF=I1=VREF/R1 by a current mirror, and an offset voltage VOFF results in accordance with current I1 between both ends of resistor R0 as set forth by equation (1) as follows:                                                                         V                OFF                            =                                                I                  1                                ·                                  R                  0                                                                                                        =                                                (                                                            V                      REF                                        /                                          R                      1                                                        )                                ·                                  R                  0                                                                                                        =                                                V                  REF                                ·                                  (                                      R0                    /                    R1                                    )                                                                                        (        1        )            
If the reference voltage VREF is constant, a predetermined offset voltage is generated by adjusting a ratio of two resistors R0 and R1. In this case, the resistors R0 and R1 should be fabricated by the same process.
As described above, the related art differential circuit has various disadvantages. The differential circuit according to a related art, which is constituted with NMOS transistors, is unable to work normally when a common voltage lower than about 1V is applied thereto.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
An object of the invention is to solve at least the above problems and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the present invention is to provide a comparator with an offset voltage that substantially obviates one or more of the problems caused by limitations and disadvantages of the related art.
Another object of the present invention is to provide an input stage of a comparator that can sufficiently amplify an input signal difference of low common voltage.
Another object of the present invention is to provide an input stage of a comparator that enables amplification of an input signal difference of low common voltage sufficiently by applying offset voltage to the common voltage in accordance with the level of the common voltage.
To achieve at least the above objects and other advantages in a whole or in part, and in accordance with the purpose of the present invention, as embodied and broadly described, a comparator according to the present invention generates an output signal of low or high level by comparing a first input voltage to a second input voltage which have a common voltage.
To further achieve the above objects in a whole or in part, and in accordance with the purpose of the present invention, as embodied and broadly described, an input stage circuit of a comparator according to the present invention includes wherein the comparator generates a comparison result signal for a first input voltage and a second input voltage that each have a common voltage, wherein the input stage circuit receives a common voltage detection signal, wherein the common voltage is supplied with a first offset voltage when the common voltage detection signal is a first level, wherein the common voltage is supplied with a second offset voltage when the common voltage detection signal is a second level, and wherein the input stage circuit amplifies to output a voltage difference between the first input voltage and the second input voltage to the comparator.
To further achieve the above objects in a whole or in part, and in accordance with the purpose of the present invention, as embodied and broadly described, a comparator that generates an output signal by comparing a first input voltage to a second input voltage according to the present invention that includes a bias voltage generator that produces a first bias voltage and a second bias voltage, a common voltage detector that generates a common voltage detection signal responsive to a level of a common voltage of the first and second input voltages, and an input stage circuit amplifies a voltage difference between the first input voltage and the second input voltage, wherein the common voltage is supplied with a first offset voltage when the common voltage detection signal is a first level, and wherein the common voltage is supplied with a second offset voltage when the common voltage detection signal is a second level.
To further achieve the above objects in a whole or in part, and in accordance with the purpose of the present invention, as embodied and broadly described, includes an input stage circuit of a comparator, the comparator generating an output signal for a second input voltage to a first input voltage received by the input stage circuit, wherein the first and second input voltages have a common voltage, wherein the input stage circuit receives a common voltage detection signal, wherein the common voltage is supplied with a first offset voltage when the common voltage detection signal is a first level, and wherein the common voltage is supplied with a second offset voltage when the common voltage detection signal is a second level, and wherein the input stage circuit amplifies to output a voltage difference between the first input voltage and the second input voltage to the comparator.
To further achieve the above objects in a whole or in part, and in accordance with the purpose of the present invention, as embodied and broadly described, includes a method for operating a comparator that includes receiving the first and second input voltages each having a common voltage, receiving a common voltage detection signal, supplying the common voltage with a first offset value to reduce a common voltage level for the first input voltage when the common voltage detection signal is a first level, supplying the common voltage with a second offset value to increase a common voltage level of the second input voltage when the common voltage detection signal is a second level, amplifying a difference between the first and second input voltages to output a voltage difference to the comparator, and comparing the voltage difference in the comparator to output a comparison result of the first and second input voltages.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.